1. Field of the Invention
This Invention relates to a method of forming semiconductor thin films, and more particularly to a method of forming polycrystalline silicon thin films which are adapted to wide applications to various electrodes and interconnect materials of semiconductor devices.
2. Description of the Related Art
Polycrystalline silicon thin films have important roles as various electrode and interconnect or wiring materials, resistors and semiconductor device materials. For example, they are used for the capacity electrodes and gate electrodes of memory devices and also buried contact materials between active layers and interconnect layers of a device. Further, recently, a polycrystalline silicon thin film transistor (TFT) has been developed, in which the polycrystalline silicon thin film itself is used as a device active layer, and thus polycrystalline silicon thin films are finding practical applications as load elements of SRAM (static RAM) or liquid crystal drive elements for liquid crystal display (LCD).
For forming these polycrystalline silicon thin films, there is a method, in which a polycrystalline silicon thin film is deposited directly by a chemical vapor deposition (CVD) process using a silane type gas (silane SiH.sub.4, disilane Si.sub.12 H.sub.6) as the source gas and at a film formation temperature of about 650.degree. C., or a method, in which an amorphous silicon thin film is deposited at a film formation temperature of about 500.degree. C., followed by a heat treatment (i.e., a crystallizing treatment) by holding a certain temperature of 600.degree..about.900.degree. C. thereby to obtain a polycrystalline silicon thin film. For example, such a method has been reported by Kobayashi et al, "Abstracts of the 20th Conference on Solid State Devices and Materials", 1989, pp. 57-60.
Particularly, the polycrystalline silicon thin films formed in the latter method have advantages over those formed in the former method in that their resistivity can be reduced more and in that they have less crystal grain boundaries which have strong influence on transistor characteristics. Thus, tills latter method is now attracting attention, and vigorous development is being made for its application to thin films for TFTs and also for providing future methods of forming various electrodes.
A prior art example of the method of forming a polycrystalline silicon thin film through crystallization of amorphous silicon will now be described. First a thermal oxide film is grown to 100 nanometers on a single crystal silicon substrate, and then an amorphous silicon thin film of 150 nanometers is formed using a usual LP-CVD (low-pressure chemical vapor deposition) furnace, thus producing an amorphous silicon substrate. As film formation conditions, for instance. the pressure is set to 0.15 Torr, the temperature to 470.degree. C. and the source gas flow rate of 100%-Si.sub.2 H.sub.6 to 96 sccm and that of He base 4%-PH.sub.3 to 120 sccm. Then, tile amorphous silicon thin film is crystallized by carrying out a heat treatment using an electric furnace and by holding the furnace temperature at 850.degree. C. for 30 minutes in, for example, a nitrogen atmosphere, thus obtaining a polycrystalline silicon substrate. If the ratio between the P and Si atom numbers in the reaction gas obtained from the gas streams of PH.sub.3 and Si.sub.2 H.sub.6 is set to P/Si=2.5.times.10.sup.-2 for tile amorphous silicon film formation, the concentration of P in the film after the crystallization is about 2.times.10.sup.20 cm.sup.-3. Where the concentration of P in the film is as high as this value, after the crystallization, a polycrystalline silicon film with a sufficiently low resistivity can be obtained, the resistivity being about 6.times.10.sup.-6 .OMEGA..m.
By varying tile P/Si ratio in the reaction gas when forming tile amorphous silicon film, the concentration of P in the polysilicon film after the crystallization is varied thereby to vary the electrical resistivity (see FIG. 3).
As is seen from FIG. , in a region where the P/Si ratio is small, the resistivity of the film is reduced as the P/Si ratio in the reaction gas increases. However, the resistivity is no longer reduced when the ratio of about P/Si=1.times.10.sup.-2 is reached, and further resistivity reduction cannot be expected by any further increase in the P/Si ratio. Rather, an excess of P deteriorates the crystallinity of the polycrystalline silicon, thus even tending to show a slight increase in the resistivity. Accordingly, in the prior art a P/Si value of 2.about.3.times.10.sup.-2 has been used as a condition for the low resistivity polycrystalline silicon film formation.
With furtherance of an integration density increase in semiconductor devices, polycrystalline silicon as electrode material is required to be used for very small areas. For example, practical polycrystalline silicon film thickness reduction is in progress in such applications as burying of contact holes with diameters of 0.2 .mu.m or below and also burying narrow areas of 0.1 .mu.m an or below as seen in the formation of complicated three-dimensional capacitors.
However, where the conditions as in the prior art are adopted for the film formation, the phenomenon seen is that, as the polycrystalline silicon film thickness is reduced, the resistivity increases sharply starting from the neighborhood of 50 nanometers (see FIG. 2). Actually, the resistivity, which has been 6.times.10.sup.-6 .OMEGA..m with a film thickness of 100 nanometers, is increased by more than one order of magnitude, i.e., to 6.5.times.10.sup.-5 .OMEGA..m with a film thickness of 25 nanometers, and it is further increased with further film thickness reduction. In the thin film growth, however, the P concentration in the film is substantially the same as in the case of tile thicknesses used in the prior art.
This phenomenon is a significant obstruction in the application of polycrystalline silicon films as various electrode materials of semiconductor devices with highly increased integration density. Accordingly, it is necessary to seek a method which enables to form polycrystalline silicon films of sufficiently low resistivities, even with thicknesses thereof being as small as 50 nanometers or below.